Fabrication of high aspect ratio posts using Si:AZ1512 and Bosch Process


Fabricate a Silicon mold containing an array of posts that are 50 μm tall, 7 μm in diameter and spaced 40 μm apart. The mold will be used to cast PDMS membranes so it may be important that the posts do not have a negative sidewall angle.


Optimize Bosch process to achieve a vertical sidewall angle.

Design of experiment

The Bosch process is a deep reactive ion etching process that etches deep structures with straight sidewalls. The Bosch process can etch silicon with rates of a few microns per second and has selectivity of up to 100 with either photoresist or silicon dioxide. The objective of this work is to modify the canned Bosch process recipe to achieve the most vertical sidewall profile. The experiment is described below:

  1. Start with a 4" Si (100) wafer
  2. Apply a photoresist adhesion promoter
    1. Use RIE180 recipe named LVC: Adhesion Promoter
      • RF Power: 70W
      • Pressure: 10 mTorr
      • O2 Flowrate: 50 sccm
      • DC Bias: 233
      • Chuck Temperature: 20C
      • Helium Pressure: 10 Torr
      • Time: 60s
    2. Spin coat immediately
  3. Spin on PR1-2000A1
    • Dispense enough photoresist to cover entire wafer
    • Spin coat at 2500 rpm, 1250 rpm/s, 60s
  4. Bake on a hotplate at 130 °C for 2 minute
  5. Expose a pattern at 48 mJ/cm2 (365 nm)
    • The pattern is an array of 7 μm hexagons spaced 40 μm apart
  6. Develop by immersion in RD6 for 1 minutes
  7. Rinse in DI wafer and dry with N2
  8. Inspect pattern with a microscope
  9. Etch patterns using RIE180 recipe named LVC: Si:PR Bosch Post
    • Oxford DRIE 180
    • The deposition and etch step is repeated 100 times
    • Common process parameters:
    • RF Power [W] 25
      ICP Power [W] 700
      Pressure [mTorr] 30
      Temperature [°C] 15

    • Deposition step parameters:
    • C4F8 [sccm] 100
      SF6 [sccm] 1
      DC Bias [V] 156
      Duration [s] Varies
    • Etch step parameters:
    • C4F8 [sccm] 1
      SF6 [sccm] 100
      DC Bias [V] 151
      Duration [s] Varies
  10. Image the sample with a scanning electron microscope


Thermal Conduction

The Bosch process is very sensitive to wafer temperature. Ideally, we want the wafer temperature to be uniform and equal to the chuck temperature. In practice, the wafer temperature is higher than the chuck temperature. In addition, the wafer is colder near the edge than the center. For example, to save resources we test the etch rate on a 12.5x12.5 mm2 chip instead of a full 100 mm wafer. The chip is fixed on 100 mm carrier wafer with either tape or PTFE oil. Figure 1 shows significantly different results when a chip is fixed on the carrier with double-sided kapton tape vs a chip fixed on the carrier with PTFE oil; these two chips are placed side by side on the carrier ensuring that both chips are exposed to the same etch process.

The failure due to poor thermal conductivity is drastic since the taped chip has dimples and the oiled chip has posts. Although fixing a sample to the carrier using oil is effective, it is quite messy. The oil is difficult to clean and excessive application of the oil may contaminate the clamp and chamber. For this reason, process development is performed directly on 100 mm wafers instead of chips.

Figure 1:  Good thermal contact is required for successful Bosch process.

Figure 1: Good thermal contact is required for a successful Bosch process.

Figure 2 shows an completed wafer with defects due to a temperature gradient across the wafer. In this equipment, the 100 mm wafer is clamped along its perimeter to keep it pressed firmly against the lower electrode. Then helium gas fills the space between the wafer and the lower electrode to improve the thermal conductivity between the wafer and electrode. Note that the chamber is under vacuum, and the thermal conductivity of vacuum is effectively zero. This helium gas causes the wafer to bow upwards at the center. This results in greater cooling near the edge of the wafer than the center. The defects at the corners of the pattern is caused by excessive deposition from the Bosch etching process. We had to tune the Bosch etch and deposition steps to achieve acceptable post geometry and minimize the size of the defected regions.

Figure 2:  The brown region (defects) near the edge of the pattern is caused by temperature differences on the wafer.

Figure 2: The brown region (defects) near the edge of the pattern is caused by temperature differences on the wafer. The droplets of water demonstrates the effectiveness of our anti-stick coating.

Sidewall Optimization

Table 1 is a summary of the etch optimization process. The canned Bosch process deposits for 5 seconds and etches for 7 seconds. The deposition and etch cycle is ran 135 times to etch approximately 50 μm deep. The sidewall angle is -2 degrees, which corresponds to an undercut in the post structure. Increasing the deposition time gradually straightens the sidewall, but also widens the diameter of the post from the expected ~6 μm to ~13 μm.

Table 1: Bosch process vs Post Geometry

Dep [s] Etch [s] Diameter [μm] Height [μm] Wall Angle [°]
5 7 8.7 46.1 -2.0
6 7 9.0 47.6 -1.2
7 7 13.2 32.5 -0.1
5 6 9.1 30.6 -0.7

Figure 3 is an SEM image comparing the post profile for two different etch process. It is evident from the images that there are deposits on the post structures and the deposits are thicker at the top of the post than at the bottom. In fact, there are relatively no deposits at the bottom of the posts since the scalloping artifact from the Bosch process is still visible.

Figure 3:  The post geometry varies significantly with process conditions.

Figure 3: The post geometry varies significantly with process conditions.